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Dr. Baker Mohammad

Dr. Baker Mohammad

Dr Baker Mohammad

Associate Professor of Electronics Engineering

Address: P.O. Box: 127788, Abu Dhabi, UAE

Telephone: +971-(0)2-5018513

Fax: +971-(0)2-4472447

Email: 

CV

Baker Mohammad is an associate professor of electronic engineering at Khalifa University, and a consultant for Qualcomm Incorporated. He is a senior member of IEEE and advisor for IEEE student branch at KUSTAR. Prior to joining Khalifa University he was a Senior staff Engineer/Manager at Qualcomm, Austin, USA where he was engaged in designing high performance and low power DSP processor used for communication and multi-media application. Before joining Qualcomm he worked on a wide range of micro-processors design at Intel Corporation from high performance, server chips > 100Watt (IA-64), to mobile embedded processor low power sub 1 watt (xscale). He has over 16 years industrial experience in microprocessor design with emphasis on memory, circuit and physical design. He earned his PhD from University of Texas at Austin in 2008, his M.S. degree from Arizona State University, Tempe, and BS degree from the University of New Mexico, Albuquerque, all in ECE. His research interest includes power efficient computing with emphasis on low power, high yield embedded memory, emerging technology such as memristor, STTRAM, and computer architecture. In addition, he is engaged in micro-watt range computing platform for WSN focusing on energy harvesting and power management including efficient dc/dc, ac/dc convertors.

Baker holds 8 issued US patents and have 4 pending patent applications. He authored one book titled “Embedded Memory Design for Multi-Core and SOC” and publishes several publications in the area of digital system design, memory design and testing, power management and power conversion, in addition to emerging memory technology modeling and design.

Baker is a member of the Technical Program Committee for several IEEE conferences such as International Conference on Computer Design (ICCD), ICECS, VLSI-SOC. Baker is regular reviewer for IEEE Transaction of VLSI journal, IEEE Transactions on Design Automation of Electronic Systems journal, and ACM Transactions on Semiconductor Manufacturing for topics related to memory design, test, yield, and memristor. 

  • Ph.D., Electrical and Computer Engineering, University of Texas at Austin (USA)
  • M.Sc., Electrical and Computer Engineering, Arizona State University (USA)  
  • B.Sc., Electrical Engineering, University Of New Mexico (USA) 
  • Fundamental of Electronics
  • Digital Logic Design
  • VLSI Design
  • Circuit Design Analysis and Theory
  • Computer Organization and Architecture
  • Embedded Systems
  • Power Efficient Computing
  • VLSI implementation of low power high performance processors
  • Embedded Memory design for high speed, low power and maximum yield
  • Computer Architecture, High performance computing
  • Design with Emerging Technology STT-RAM, Memristor, eDRAM, and MRAM
  • Design for test (DFT) and Design for Manufacturing with the present of variation (DFM)
  • Energy harvesting and power management

Industrial Experience:

  • 2004 to 2010 Senior Staff Engineer/Manager Qualcomm Incorporated, Austin, TX, USA
  • 2000 to 2004 Senior Component Design Engineer Intel Corporation, Fort Collins, CO, USA
  • 1995 to 2000 Circuit Design Engineer Intel Corporation Tempe, AZ, USA

Google Scholar  Scopus

Books

Refereed Journals 

N.B. IF = Impact factor 

  • B. Mohammad, Maguy Abi Jaoude, Vikas Kumar, Dirar Mohammad Al Homouz, Heba Abu Nahla, Mahmoud Al-Qutayri, Nicolas Christoforou: "State-of-the-art of metal-oxide memristor devices" Nanotechnology Reviews, degruyter, volum 5, issue 3, pp 311-329, June 2016; DOI:10.1515/ntrev-2015-0029 (IF = 2.044)

Inventions and Patents
Author and co-Author more than 19 issued US patent and several pending patent applications.

Granted Patents:

  • B. Mohammad, D. Homouz. “A system and method for designing a hybrid memory cell with memristor and complementary Metal-Oxide Semiconductor”, US Patent 9299425, March 2016 
  • Salahat, Ehab Najeh; Saleh, Hani Hasan Mustafa; Sluzek, Andrzej Stefan; Al-qutayri, Mahmoud; Mohammad, Baker; Elnaggar, Mohammed Ismail; " Architecture and method for real-time parallel detection and extraction of maximally stable extremal regions (MSERS) 2016 "US Patent 9,311,555"
  • Salahat, Ehab Najeh; Saleh, Hani Hasan Mustafa; Sluzek, Andrzej Stefan; Al-qutayri, Mahmoud; Mohammad, Baker; Elnaggar, Mohammed Ismail; " HARDWARE ARCHITECTURE FOR REAL-TIME EXTRACTION OF MAXIMALLY STABLE EXTREMAL REGIONS (MSERs) 2016 "US Patent 20,160,071,280"
  • Salahat, Ehab Najeh; Saleh, Hani Hasan Mustafa; Salahat, Safa Najeh; Sluzek, Andrzej Stefan; Al-qutayri, Mahmoud; Mohammad, Baker; Elnaggar, Mohammed Ismail; " Object Detection and Tracking Using Depth Data 2016 "US Patent 20,160,117,830"
  • Salahat, Ehab Najeh; Saleh, Hani Hasan Mustafa; Salahat, Safa Najeh; Sluzek, Andrzej Stefan; Al-qutayri, Mahmoud; Mohammad, Baker; Elnaggar, Mohammed Ismail; " METHODS AND SYSTEMS FOR PROCESSING MRI IMAGES TO DETECT CANCER 2016 "US Patent 20,160,113,546"
  • Habte, Temesghen Tekeste; Bayasi, Nourhan Yahya; Saleh, Hani Hasan Mustafa; Khandoker, Ahsan Habib; Mohammad, Baker; Al-qutayri, Mahmoud; Elnaggar, Mohammed Ismail; " MEDICAL DEVICE HAVING AUTOMATED ECG FEATURE EXTRACTION 2016 "US Patent 20,160,120,431"
  • Mohammad, Baker S; Bassett, Paul D; Saint-Laurent, Martin; " System and method for reducing cross coupling effects 2016 "US Patent App. 15/045,282"
    Al Ahmad, Mahmoud; Mohammad, Baker; " VIBRATIONAL ENERGY HARVESTING SYSTEM 2016 "US Patent 20,160,134,204"
  • E. Salahat, H. Saleh, B. Mohammad, et. Al “Architecture and method for real-time parallel detection and extraction of maximally stable extremal regions (MSERS)”, US patent 9,311,555, September, 10th 2014
  • B. Mohammad, “System and Method to Read a Memory Cell with a Complementary Metal-Oxide-Semiconductor (CMOS) Read Transistor”, US Patent, 8737117, May 27, 2014
  • B. Mohammad, H. Kim, P. Basset, “Method and apparatus for testing a memory device,” US Patents : 8,466,707 , March 3ed 2010, and 8884637, June, 18, 2013
  • S. Venkumanhnti, B. Mohammad, “Thread allocation and clock cycle adjustment in an interleaved multi-thread processor”, US Patent, 8397238, March 12, 2013
  • B. Mohammad, “System and Method including built-in self-test (BIST) circuit to test cache memory” US Patent, 8127184, February, 28 2012
  • B. Mohammad et. al, “Systems and methods for low power, high yield memory”, US Patent, 7760576, July, 20th, 2010
  • M. Saint-Laurent, B. Mohammad, P. Bassett, “Sequential circuit element including a single clocked transistor”, US Patent, 7746137, June, 29th 2010
  • B. Mohammad,. M. Ahmad; P. Bassett, Paul; S. Jamil, A. Ingle, “Low power microprocessor cache memory and method of operation, “US Patent, 7620778, Nov. 17th 2009
  • B. Mohammad, M. Saint-Laurent, P. Bassett, “Circuit device and method of controlling a voltage swing”, US Patent, 7567096, July, 28, 2009
  • B. Mohammad, P. Bassett, “System and method for low power wordline logic for a memory”, US Patent, 7466620, Dec, 16th, 2008

Refereed Conferences

  • N. Bayasi, T. Tekeste, H. Saleh, B. Mohammad and M. Ismail, "A 65-nm low power ECG feature extraction system" 2015 IEEE International Symposium on Circuits and Systems (ISCAS), Lisbon, pp. 746-749, May 2015, doi: 10.1109/ISCAS.2015.7168741
  • T. Tekeste et al., "Adaptive ECG interval extraction," 2015 IEEE International Symposium on Circuits and Systems (ISCAS), Lisbon, 2015, pp. 998-1001; doi: 10.1109/ISCAS.2015.7168804
  • H. Elgabra, I. A. H. Farhat, A. S. A. Hosani, D. Homouz and B. Mohammad, "Mathematical modeling of a memristor device," Innovations in Information Technology (IIT), 2012 International Conference on, Abu Dhabi, 2012, pp. 156-161; doi: 10.1109/INNOVATIONS.2012.6207722
  • Z. Abid, D. Homouz, B. Mohammad and W. Wang, "Memristors-based NMOS logic circuits," 2012 24th International Conference on Microelectronics (ICM), Algiers, Algeria, 2012, pp. 1-4; doi: 10.1109/ICM.2012.6471402
  • S. Bijansky, B. Mohd and B. Mohammad, "Dynamic power analysis for custom designs," 2009 IEEE International Conference on IC Design and Technology, Austin, TX, 2009, pp. 173-176; doi: 10.1109/ICICDT.2009.5166289
  • B. Mohammad, M. Saint-Laurent, P. Bassett and J. Abraham, "Cache Design for Low Power and High Yield," 9th International Symposium on Quality Electronic Design (isqed 2008), San Jose, CA, 2008, pp. 103-107; doi: 10.1109/ISQED.2008.4479707